Browsing by Author "Agarwal, Yash"
Now showing items 1-2 of 2
-
Chip level simulation for timing analysis of a target micro controller
Mishra, Priyabrata (2020)Recent advancements in the automobile industry and the exponential development of the semiconductor industry has led to a new paradigm of the automobile, called Automatic vehicle. In this paradigm, the integration of more ... -
Full chip interface timing, pipeline planning and rapid floorplanning
Somaiya, Isha Nalinbhai (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)This report gives some glance on VLSI design flow and mainly deals with Physical Design of the chip. This is a very important step of the flow because it decides the shape and size of the chip. This step ensures that the ...