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    • Dynamic recognfiguration of cache memories for leakage power reduction 

      Kalidindi, Vijaya Rama Raju (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      Power is increasingly becoming a design constraint for low power VLSI circuits. It has become one of the most important paradigms of design convergence for future icroprocessors. The scaling of the CMOS channel length to ...