Browsing by Author "Kiran V, V S S Ravi"
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Timing aware asic design flow (RC physical)
Kiran V, V S S Ravi (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)Lack of communication between frontend and backend designers is the most important issue in today�s ASIC (Application Specific Integrated Circuits) design. The frontend designers lack knowledge about the long wires which ...