Browsing by Author "Patel, Sagar"

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    • Low-power pipelined crypto-core using a backup flip-flop 

      Patel, Sagar (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      With increasing clock frequencies, power-aware computing has become a critical concern in the VLSI design. One of the most effective and widely used method for lowering the power is DVS (Dynamic Voltage Scaling), which ...