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    • High-speed 512-point FFT single-chip processor architecture 

      Sinha, Ajay Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
      This thesis present a fully parallel novel fixed point 16-bit word width 512 point FFT processor architecture. The 512 point FFT is realized by decomposing it into three 8 point FFT units. This approach reduces the number ...