Now showing items 1-6 of 6

    • D-latch based low power memory design 

      Tripathi, Saurabh (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      Low power consumption is the main attraction of the digital circuit design in the Sub threshold region of operation. In this region of operation less energy is consumed for active operation and less leakage power is ...
    • Design and analysis of ultra wideband low noise amplifier 

      Dhami, Aarushi (Dhirubhai Ambani Institute of Information and Communication Technology, 2018)
      With the advent of wireless technology, ultra wide band systems due to their fast data rate transmission have gained momentum. One of the basic building blocks of the receiver - Low Noise Amplifier (LNA) has seen various ...
    • Design of CMOS front end for 900MHz RF receiver 

      Harshey, Jitendra Prabhakar (Dhirubhai Ambani Institute of Information and Communication Technology, 2004)
      Portable wireless personal communication systems such as cellular phones, message pagers, and wireless modems traditionally have been built from a mixture of IC technologies. In fact if we section a commercial cellular ...
    • Low-power pipelined crypto-core using a backup flip-flop 

      Patel, Sagar (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      With increasing clock frequencies, power-aware computing has become a critical concern in the VLSI design. One of the most effective and widely used method for lowering the power is DVS (Dynamic Voltage Scaling), which ...
    • Path planning of data mule using responsible short circuit with steiner points 

      Vora, Ankitkumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      We have studied the problem of data aggregation method in wireless sensor network using the data mule. In data mule approach, Data mule is the mobile entity which can collect the data from stationary sensor node in the ...
    • Single electron transistor based 4-bit ALU design, simulation and optimization 

      Joshi, Rathin K. (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      Objective of this thesis work is to create and optimize Single Electron Transistor(SET) based digital design. In present era for electronics, alternative approaches, other than CMOS (like SET,finFET,quantom dot) are much ...