Now showing items 1-12 of 12

    • Design and Implementation of Low Power Superscalar Processors 

      Kotawala, Fatema (Dhirubhai Ambani Institute of Information and Communication Technology, 2018)
      This thesis presents an 8-stage low power Superscalar processor. Since there has come an upper limit on the frequency that a single core inline processor can provide, to improve performance we need to exploit concepts like ...
    • Design methodology for architecting application specific instruction set processor 

      Desai, Meghana (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      Application Specific Instruction-set Processors (ASIP), also referred as extensible processors, represent the state-of-the-art microprocessor architecture. ASIPs are practically leading towards the realization of ...
    • Design of a high speed I/O buffer 

      Rathore, Akhil (Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
      In high speed serial transmission of data, output buffer creates the bottleneck. Current Mode Logic (CML) buffers have gained wide acceptance in most high speed serial interfaces as they reach speed of the order of Gbp/s. ...
    • Event-driven service-oriented architecture for dynamic composition of Web services 

      Laliwala, Zakir (Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
      The Business process contains a set of services to fulfill its goal. The Service is a software component to perform a specific activity of a business process. The Business processes are event-driven and change frequently ...
    • High Performance Computing 

      Patel, Jaykumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2016)
      Technology today has evolved from the Mainframe computers to laptops to small and smart handheld devices. These smart end devices are accompanied with extremely robust ARM 64-bit processors which are a perfect blend of ...
    • Implementation of different branch prediction schemes on FabScalar generated superscalar processor 

      Patel, Jayesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      Performance of modern pipeline processor depends on steady flow of useful instruction for processing. Branch instruction in the program disrupts the sequential flow of instruction by presenting multiple paths through which ...
    • Implementation of high speed serial communication blocks 

      Parekh, Devang Tarunkumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
      Serial communication is widely being used from PCs to handheld mobile phones due to very less hardware, low cost, easier design process in comparison to parallel communication. For bit by bit, reliable transmission and ...
    • Improvement of tagged architecture for preventing software vulnerabilities 

      Shah, Tejaskumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
      In spite of the many defense techniques, software vulnerabilities like buffer overflow, format string vulnerability and integer vulnerability is still exploited by attackers. These software vulnerabilities arise due to ...
    • Investigating into a light-weight reconfigurable VLSI architecture for biomedical signal processing applications 

      Jain, Nupur (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)
      The Body Sensor Network systems consist of signal acquisition and processing blocks along with Power Management Unit and radio transmission capabilities. The high power consumption of the radio transmission is often ...
    • Low power microprocessor design 

      Bhatt, Vishal (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      This research work tries to reduce the power consumption of a processor with signal processing features. For low power design, focus is on developing ‘Low power synthesizable Register File’, as the initial study shows that ...
    • Migration in initial and dynamic virtual machine placement algorithms 

      Reddy, Narender A. (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      Cloud computing provides a computing platform for the users to meet their demands in an efficient way. Virtualization technologies are used in the clouds to aid the efficient usage of hardware. Virtual machines are utilized ...
    • Realization of FPGA based digital controller 

      Patel, Amit (Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
      Field Programmable Gate Array (FPGA) can be used to enhance the efficiency and the flexibility of digital controller. FPGA implementation of digital controllers leads to real time realizations with small size and high ...