Now showing items 1-2 of 2

    • Low-power pipelined crypto-core using a backup flip-flop 

      Patel, Sagar (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      With increasing clock frequencies, power-aware computing has become a critical concern in the VLSI design. One of the most effective and widely used method for lowering the power is DVS (Dynamic Voltage Scaling), which ...
    • Performance enhancement of a pipelined architecture using backup FF 

      Singh, Shikha (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      Commonly used devices like computers and mobile phones demand faster processors. These devices need to live up to the ever growing demand of consumers for performance. Special techniques like Pipelining and Superscalar ...