Now showing items 1-3 of 3

    • Design of low power and high speed decoder for 1MB memory 

      Gupta, Punam Sen (Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
      Technology scaling is accompanied by rise in leakage power dissipation. This thesis proposes a voltage controllable circuit in the feedback path of the decoder, which drastically reduces the standby leakage current with ...
    • Novel 7T SRAM cell design for low power cache applications 

      Joshi, Srawan Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
      Scaling in integrated circuit technology directly paves way to increased package density, thereby increasing onchip power. With continuous scaling, low power design techniques results in efficient use of silicon die. ...
    • Study of power in CR-SRAM in context of precharge reference voltage. 

      Rupapara, Kripal D. (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      In Morden times power dissipation in electronic circuits has become more important due to increase use of portable and handheld devices. Increased operating frequency results in more power consumption in almost every VLSI ...