Now showing items 1-10 of 10

    • 1v rail to tail operational amplifier design for sample and hold circuits 

      Kumar, Mahesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
      At low voltage, the input common mode voltage of Operational amplifier is limited which restricts its use as a buffer. This works deals with designing a rail to rail amplifier. The Thesis presents a 1V rail to rail operational ...
    • Analysis of charge injection in a MOS analog switch with impedance on source side 

      Rao, D. Srinivas (Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
      Turning off of a transistor introduces error voltage at the output of Sample and Hold circuits which are the key components of Analog to Digital Converters (ADCs) and hence limits their accuracy of performance in high ...
    • Area reduction in 8 bit binary DAC using current multiplication 

      Upraity, Maitry (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      A proposed current multiplication technique is applied on 8 bit binary current steering Digital-to -Analog Converters with LSB 150 μA, to reduce area. MSB 1 and MSB 2 current are first kept half to reduce area and then ...
    • CMOS latched comparator design for analog to digital converters 

      Gupta, Amit Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      Conventional comparators are at the two extremes as far as power delay product and isolation between input and output is concern. Either they achieved very good isolation at the cost of power in the preamplifier or save ...
    • CMOS RFIC mixer design 

      Gupta, Mukesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      A CMOS RF (Radio Frequency) up/down conversion mixer results in a reasonable increase in transceiver integration and a reduction in cost. The design of mixers faces many compromises between conversion gain(GC), local ...
    • Design of the analog front end circuit for X-ray detectors 

      Roy, Subhash Chandra (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
      The Thesis presents a novel idea to efficiently read out the value corresponding to incident X-Ray, from X-Ray sensor. A system level solution has been proposed which is unique in itself in terms of approach. A simple ...
    • High-performance low-voltage current mirror design 

      Gandhi, Nikunj (Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
      Design of high precision analog circuits requires accounting for the mismatch between nominally identical transistors. In this work, errors affecting CMOS current mirrors due to mismatch between identical transistors are ...
    • Investigation of low power design of left-right leap frog array multiplier 

      Sankar, K. Ravi (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      This thesis addresses the Low Power design of 12 bit LRLFAM at the Layout, circuit and logic levels. A new Low power Booth-Recoder (BR), and Multiplexer based partial product generated are designed using pass-Transistor ...
    • Low drop-out (LDO) voltage regulator without off-chip capacitor 

      Agarwal, Gopal (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
      Designing of Low Drop-Out Voltage Regulators (LDOs) operating without a large off-chip capacitor, having a very good transient response and maintaining the loop stability for full load current range in low supply voltage ...
    • Particle swarm optimization based synthesis of analog circuits using neural network performance macromodels 

      Saxena, Neha (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
      This thesis presents an efficient an fast synthesis procedure for an analog circuit. The proposed synthesis procedure used artificial neural network (ANN) models in combination with particle swarm optimizer. ANN has been ...