Browsing by Subject "Logic circuits"
Now showing items 1-2 of 2
-
Designing of an efficient power clock generation circuit for complementary pass-transistor adiabatic logic carry save multiplier
(Dhirubhai Ambani Institute of Information and Communication Technology, 2008)This thesis presents a novel four-phase power clock generator for low power adiabatic logic without using inductors. The power clock generator is designed using current mirror arrangement of PMOS and NMOS transistors. ... -
Reduction of power using innovative Clock Gating and Multi Vth techniques in digital design
(Dhirubhai Ambani Institute of Information and Communication Technology, 2012)Low power is one of the most important issues in today’s ASIC (Application Specific Integrated Circuit) design. As the transistors scale down, power density becomes high and there is immediate need of reduction in power. ...