Browsing by Subject "Operand isolation"
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Reduction of power using innovative Clock Gating and Multi Vth techniques in digital design
(Dhirubhai Ambani Institute of Information and Communication Technology, 2012)Low power is one of the most important issues in today’s ASIC (Application Specific Integrated Circuit) design. As the transistors scale down, power density becomes high and there is immediate need of reduction in power. ...