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    Area reduction in 8 bit binary DAC using current multiplication

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    200511022.pdf (612.7Kb)
    Date
    2007
    Author
    Upraity, Maitry
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    Abstract
    A proposed current multiplication technique is applied on 8 bit binary current steering Digital-to -Analog Converters with LSB 150 μA, to reduce area. MSB 1 and MSB 2 current are first kept half to reduce area and then current multiplication is performed to get the desired output. Compare to the conventional binary current steering Digital-to-Analog Converters, 20.66% area is reduced and static errors are found within limit. Maximum Integral nonlinearity is-18μA (< LSB) and Differential nonlinearity5.02 μA (< LSB).
    URI
    http://drsr.daiict.ac.in/handle/123456789/154
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    • M Tech Dissertations [923]

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