ASIC implementation of discrete fourier transform processing module
This work presents the design and ASIC implementation of Discrete Fourier Transform Processing Module. The performance of designed DFT processing module is better than radix-2 and radix-4 FFT algorithms, and is comparable to Split radix FFT algorithm, in terms of computational requirements. Different architectures are proposed for DFT processing module, and their comparative analysis is done. ASIC implementation of Discrete Fourier Transform processing module includes, its modelling using Verilog HDL, gate level synthesis of the modelled design and physical synthesis of netlist generated by gate level synthesis. The functionality of Design after physical synthesis is verified. Designed DFT processing module is retargetable and can be used as an IP.
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Sinha, Ajay Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2008)This thesis present a fully parallel novel fixed point 16-bit word width 512 point FFT processor architecture. The 512 point FFT is realized by decomposing it into three 8 point FFT units. This approach reduces the number ...
Jain, Akansha (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)Future mobile communications systems reaching for ever increasing data rates require higher bandwidths than those typical used in todays cellular systems. By going to higher bandwidth the (for low bandwidth) at fading ...
Design and implementation of 128-point fixed point streaming FFT processor for OFDM based communication system Verma, Sunil Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)Fast Fourier Transform (FFT) processors are today one of the most important blocks in communication systems. They are used in every communication system from broadband to 3G and digital TV to Radio LANs. This master’s ...