Design of voltage reference circuits
Abstract
Shrinking device dimensions in advancing CMOS technologies require lower supply voltages to ensure device reliability. As a result, analog circuit designers are faced with many challenges in finding new ways to build analog circuits that can operate at lower supply voltages while maintaining performance. Bandgap references are subject to these head-room problems especially when the required supply voltage approaches the bandgap voltage of silicon. However, the bandgap reference working with a low supply voltage often has a higher temperature coefficient than that of a traditional bandgap reference. This has resulted in the development of new temperature-compensated techniques.
Piecewise linear curvature correction method is simple yet robust technique which was previously available in bipolar technology. This research work describes a Novel CMOS bandgap reference which uses piecewise-linear curvature compensation scheme for second order correction. In standard 0.18μm CMOS process, the reference, with 1.8 V supply produces an output of about 928 mV, which varies by 160 μV from -25 °C to 150°C. It dissipates 150 μW and has a DC PSRR of -46 dB.
Collections
- M Tech Dissertations [923]
Related items
Showing items related by title, author, creator and subject.
-
Design of low-voltage, low-power, wide-band CMOS LC VCO using active inductors
Sesha Sai, Aduru Venkata Raghava (Dhirubhai Ambani Institute of Information and Communication Technology, 2008)In this thesis the design of low-voltage, low-power, wide-band CMOS LC VCO using active inductor has been proposed. The oscillator is based upon the classic LC-tuned negative-resistance topology, with a novel active inductor ... -
Built-in self test architecture for mixed signal systems
Jain, Mahavir Rajmal (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)Built-in self test architecture or BIST as we call them, are the necessity of time since the shrinking sizes of component on-chip with advance in IC technology are making it BIST artistries are being rapidly developed and ... -
Investigation of low power design of left-right leap frog array multiplier
Sankar, K. Ravi (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)This thesis addresses the Low Power design of 12 bit LRLFAM at the Layout, circuit and logic levels. A new Low power Booth-Recoder (BR), and Multiplexer based partial product generated are designed using pass-Transistor ...