Show simple item record

FPGA implementation of direct sequence spread spectrum techniques

dc.contributor.advisorDubey, Rahul
dc.contributor.authorChoudhary, Vivek Kumar
dc.date.accessioned2017-06-10T14:37:35Z
dc.date.available2017-06-10T14:37:35Z
dc.date.issued2008
dc.identifier.citationChoudhary, Vivek Kumar (2008). FPGA implementation of direct sequence spread spectrum techniques. Dhirubhai Ambani Institute of Information and Communication Technology, 34 p. (Acc.No: T00179)
dc.identifier.urihttp://drsr.daiict.ac.in/handle/123456789/216
dc.description.abstractThis work presents the performance, noise analysis and FPGA implementation of Direct Sequence Spread Spectrum technique. Performance of signal increases as increasing parity bits in Hamming code algorithm. Increasing parity noise goes reduce therefore received signal close to its original value, but adding parity band-width requirement also increases. This work is bases on the IS-95 standard for CDMA (Code Division Multiple Access) Digital Cellular.
dc.publisherDhirubhai Ambani Institute of Information and Communication Technology
dc.subjectField programmable gate arrays
dc.subjectComputer-aided design
dc.subjectVerilog
dc.subjectComputer hardware description language
dc.subjectNeural networks
dc.subjectComputer science
dc.subjectField programmable gate arrays
dc.subjectMobile communication systems
dc.subjectTelecommunication systems
dc.subjectManagement
dc.subjectModeling
dc.subjectComputer programs
dc.subjectSensor networks
dc.subjectSimulation methods
dc.subjectWireless communication systems
dc.classification.ddc621.38456 CHO
dc.titleFPGA implementation of direct sequence spread spectrum techniques
dc.typeDissertation
dc.degreeM. Tech
dc.student.id200611029
dc.accession.numberT00179


Files in this item

Thumbnail
Name:
200611029.pdf
Size:
913.3Kb
Format:
PDF
View/Open

This item appears in the following Collection(s)

Show simple item record