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dc.contributor.advisorMandal, Sushanta
dc.contributor.advisorNagpal, Raj Kumar
dc.contributor.advisorNagchoudhuri, Dipankar
dc.contributor.authorPathak, Abhishek
dc.date.accessioned2017-06-10T14:37:51Z
dc.date.available2017-06-10T14:37:51Z
dc.date.issued2009
dc.identifier.citationPathak, Abhishek (2009). Analysis and modeling of power distribution network and decoupling network design strategies for high speed digital and analog VLSI system. Dhirubhai Ambani Institute of Information and Communication Technology, xi, 48 p. (Acc.No: T00208)
dc.identifier.urihttp://drsr.daiict.ac.in/handle/123456789/245
dc.description.abstractToday’s high speed digital and analog VLSI systems are operating in GHz frequency range. With high switching rate of the devices, power distribution network (PDN) impedance causes ripples in power supply. If PDN is not designed properly it can cause false switching, or even it can damage the device permanently. In this thesis whole power distribution network (PDN) for VLSI system has been modeled using RLC equivalent circuits which can be run on any simulation program with integrated circuit emphasis (SPICE) based simulator. Frequency dependent RLC model for printed circuit board (PCB) and package interconnects has been generated, and effects of different geometry and material of interconnects on PDN impedance profile have been analyzed. Model is compared with electromagnetic (EM) full wave simulator both for the accuracy and CPU run time and it is found that model shows good accuracy with very less CPU run time as compared to full wave simulator which can take more than a day to simulate whole geometry. To meet the target impedance of PDN, Strategies for choosing decoupling capacitors and their placement over power plane have been analyzed. Key-words: Power Integrity, power delivery network, voltage regulator, simultaneous switching noise.
dc.publisherDhirubhai Ambani Institute of Information and Communication Technology
dc.subjectSemiconductor storage devices
dc.subjectMicroprocessors
dc.subjectApplication specific integrated circuits
dc.subjectIntegrated circuits
dc.subjectVery large scale integration
dc.subjectDigital communications
dc.subjectMeasurement
dc.subjectData transmission systems
dc.classification.ddc621.395 PAT
dc.titleAnalysis and modeling of power distribution network and decoupling network design strategies for high speed digital and analog VLSI system
dc.typeDissertation
dc.degreeM. Tech
dc.student.id200711018
dc.accession.numberT00208


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