Now showing items 206-225 of 820

    • Design of a high speed I/O buffer 

      Rathore, Akhil (Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
      In high speed serial transmission of data, output buffer creates the bottleneck. Current Mode Logic (CML) buffers have gained wide acceptance in most high speed serial interfaces as they reach speed of the order of Gbp/s. ...
    • Design of a low noise amplifier for UWB range of 5.5-8.5 GHz 

      Vyas, Krunal D. (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      This study reviews and analyze the designing of Low Noise Amplifier. The parameters should be analyzed properly before the design of LNA, so this thesis includes the basics of all parameters with transmission line usage ...
    • Design of a low power high slew rate OPAMP and to study its impact on sigma delta modulator's performance 

      Verma, Aseem (Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
      This thesis presents the work done on the design of a low-power, high slew rate opamp and subsequently the design of a fully-differential second order Switched-Capacitor architecture of a Sigma Delta modulator in 1.8 V, ...
    • Design of a low power, high speed MAC unit 

      Mohanty, Swaprakash (Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
      MAC operation is the main computational kernel in any digital signal processing architectures. MAC consumes nearly 2/3 portion of total power dissipated in a DSP block. This thesis deals with the design of a low power, ...
    • Design of a novel high linearity down conversion mixer for GSM band applications 

      Srinaga, Nikhil N. (Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
      Double balanced Gilbert cell mixer (GCM) is the mostly used kind of mixer as it provides conversion gain and has port to port isolation. This mixer lacks in linearity and noise figure which are to be taken care in designing ...
    • Design of a Real Time Low Power Interrupt Driven Processor With Fair Scheduling 

      Shrotriya, Tushin (Dhirubhai Ambani Institute of Information and Communication Technology, 2017)
      "Recent times have seen a considerable amount of growth in the processor industry. The design of a processor is mainly focussed on two aspects namely, high performance or low power. While some high-end applications require ...
    • Design of AHB-Wishbone bridge 

      Mistry, Shailesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2004)
      System-on-Chip (SoC) design is performed through integration of pre-designed components, called intellectual Property (IP). Design reuse is a critical feature in SoC design. Design reuse is the simple concept of using IP ...
    • Design of an analog phase shifter at X-band for radar and telecom applications 

      Pariyani, Sandeep (Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
      When examining a monthly bank account statement it is not only the number below the bottom line that matters. Whether that number has a minus or plus in front of it is also crucial. For many technical issues, the sign ...
    • Design of an interrupt driven processor having deterministic exception response 

      Parikh, Sagar (Dhirubhai Ambani Institute of Information and Communication Technology, 2016)
      In recent times, we have seen an impressive growth of portable devices, audiovideobased multimedia products and wireless communication systems. To meetthe intensive computational requirements and complex real time functions, ...
    • Design of architecture of artificial neural network : design and construction of a model for creation of an architecture of artificial neural network based on distributed genetic algorithms 

      Rahi, Sajid S. (Dhirubhai Ambani Institute of Information and Communication Technology, 2004)
      The objective of the work is to design and construct a model for creation of architecture of feed forward artificial neural network. The distributed genetic algorithms are used to design and construct the system. This ...
    • Design of CDMA transmitter and three finger rake receiver 

      Pateriya, Bhavana (Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
      As cellular wireless communication becomes a worldwide communication standard, it is important in studying how data communications happens in a cellular system. In this Thesis work CDMA transmitter and receiver have been ...
    • Design of CMOS front end for 900MHz RF receiver 

      Harshey, Jitendra Prabhakar (Dhirubhai Ambani Institute of Information and Communication Technology, 2004)
      Portable wireless personal communication systems such as cellular phones, message pagers, and wireless modems traditionally have been built from a mixture of IC technologies. In fact if we section a commercial cellular ...
    • Design of CMOS voltage controlled oscillator for high tuning range 

      Nayudu, Bharath Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      The main objective of the work is to design a CMOS voltage controlled oscillator for higher tuning range. Today there is a great need for multi-standard wireless receivers in the wireless communications. A receiver is to ...
    • Design of countermeasures for replay spoof speech attack 

      Tak, Hemlata (Dhirubhai Ambani Institute of Information and Communication Technology, 2018)
      Automatic Speaker Verification (ASV) system is a biometric person authentication system to verify a claimed speaker's identity from his/her voice with the help of machines. The ASV systems are vulnerable to various types ...
    • Design of cutom wireless protocol for signal transmission inside space equipment 

      Sanghani, Hardik Jayesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      There are many sensors and devices inside the satellite. All these devices need to communicate with each other, those devices can be sensor nodes or control device. According to current technology communication between ...
    • Design of digital accelerometer based seismic sensor node 

      Sharma, Nisha (Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
      The aim of Design of Digital Accelerometer based Seismic Sensor Node is to propose a design for wireless sensor network for exploring the sub-surface region of the moon by studying the seismic waves generated over there. ...
    • Design of fiber to the village using passive optical networks 

      Maloo, Anshul (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      Fiber occupied networks are coming out with a performances which are supporting the ongoing demands for very huge connections. One best technology that had evolved in the previous few course of time is Passive Optical ...
    • Design of frequency synthesizable delay locked loop 

      Shah, Hardik K. (Dhirubhai Ambani Institute of Information and Communication Technology, 2004)
      As the speed performance of VLSI systems increases rapidly, more emphasis is placed on suppressing skew and jitter in the clocks. Phase-locked loops (PLLs) and delay-locked loops (DLLs) have been typically employed in ...
    • Design of laser driver circuit 

      Khera, Neha (Dhirubhai Ambani Institute of Information and Communication Technology, 2005)
      Designing an Optoelectronic Integrated Circuit (OEIC) is an attractive field of research as it bridges the interface between electrical and optical components. The design of laser driver in optical transmitter is very ...
    • Design of leaf cell layouts for memory compiler 

      Nagaich, Esha (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)
      Digital layouts are designed in such a way that it should have minimum area and hence lesser delay.On the contrary analog layouts are made using best matching technique so as to provide same environment to each transistors.In ...