Now showing items 366-385 of 820

    • HDL based implementation of a node of hierarchical temporal memory. 

      Vyas, Pavan R. (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      The main intention of this thesis is to give the basic information about the implementation of a node of one of the neural network algorithms. The main purpose of this thesis is to design, implement and analyze the node ...
    • HDL implementation and study of ANN architecture mapping onto multiple processing nodes 

      Dalal, Tejas D. (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      A general methodology has implemented on several Processing Nodes (PN) to be connected to form an Artificial Neural Network (ANN). This design has multiple Activation functions on the same architecture which makes it ...
    • HDL implementation of a node of bayesian polytree interface 

      Patel, Jayendra (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      In this thesis, we have particularly focussed on the aspects of the hardware implementation of the Bayesian inference framework within the George and Hawkins’ model. This framework is based on Judea Pearl’s belief propagation. ...
    • HDL implementation of associative memory based instruction predictor for power reduction 

      Rangani, Jaydeep (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      Now a days, power consumption in digital integrated circuits/systems is a major issue. The goal here is to reduce power consumption, by assuming the circuit is divided in different power consuming modules, observing their ...
    • HDL implementation of palm associative memory 

      Kacheria, Rachit M. (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      The objective of this paper is to implement and analyze the palm associative memory proposed by G. Palm [1]. In this paper, a design implementation of this algorithm, based on Verilog HDL (hardware description language) ...
    • Heuristic approach for segment based pairwise sequence alignment in bioinformatics 

      Desai, Jeet (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
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    • Heuristics for pair-wise sequence alignment 

      Patel, Dhara (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      Develop framework for pairwise alignment of given two sequences based on their feature. There may be situation in which sequences look different but share common structure, function or evolutionary related information. ...
    • High Performance Computing 

      Patel, Jaykumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2016)
      Technology today has evolved from the Mainframe computers to laptops to small and smart handheld devices. These smart end devices are accompanied with extremely robust ARM 64-bit processors which are a perfect blend of ...
    • High speed sample and hold circuit design 

      Dwivedi, Varun Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
      Sampling of the time-varying input signal is the first step in any type of Analog to Digital (A/D) conversion. For Low Power and high-speed A/D converter, a high-performance Sample and Hold (S/H) circuit is needed as its ...
    • High speed, low offset voltage cmos comparator 

      Sheikh, Parveen (Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
      The Analog to digital converters are the key interface blocks between the continuous time domain and the discrete-time digital domain. The performance of high-speed data conversion and digital communication interfaces is ...
    • High-performance low-voltage current mirror design 

      Gandhi, Nikunj (Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
      Design of high precision analog circuits requires accounting for the mismatch between nominally identical transistors. In this work, errors affecting CMOS current mirrors due to mismatch between identical transistors are ...
    • High-speed 512-point FFT single-chip processor architecture 

      Sinha, Ajay Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
      This thesis present a fully parallel novel fixed point 16-bit word width 512 point FFT processor architecture. The 512 point FFT is realized by decomposing it into three 8 point FFT units. This approach reduces the number ...
    • HMM-based speech synthesis system (HTS) for Gujarati language. 

      Shah, Nirmesh Jayeshkumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      Hidden Markov Models (HMM) have been applied successfully to Automatic Speech Recognition (ASR) problems and are currently applied in speech synthesis applications. In this thesis, HMM-based Speech Synthesis System (HTS) ...
    • Hot and cold data identification using query aware hybrid partitioning 

      Kanwar, Jai Jai (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      The price of main memory is reducing with time, which helps to store huge amount of data in the memory. OLTP applications have large database size. It is observed that some applications exhibit skewed access pattern i.e. ...
    • Hotel management system 

      Shah, Rajat Jatinbhai (Dhirubhai Ambani Institute of Information and Communication Technology, 2019)
      I have worked on two products of Emxcel Solutions Pvt.Ltd namely Bnc and Bns admin portal. In that I used angular framework for front end and node js for backend. I have created REST api to communicate with server . Also ...
    • Human action recognition in video 

      Kumari, Sonal (Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
      Action recognition is a central problem in computer vision which is also known as action recognition or object detection. Action is any meaningful movement of the human and it is used to convey information or to interact ...
    • Human Action Recognition Using Deep Neural Networks 

      Thakkar, Shaival (Dhirubhai Ambani Institute of Information and Communication Technology, 2017)
      "In this thesis, we present a hierarchical approach for human action classification using 3-D Convolutional neural networks (3-D CNN). Human actions refer to positioning and movement of hands and legs and hence can be ...
    • hybrid approach to digital image watermarking using informed coding, informed embedding and spread spectrum 

      Dey, Nayan Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
      The growth and popularity of the Internet has led to the data storage of multimedia data (audio, image and video) in digital form. The digitization form of multimedia data can be copied easily and then distributed again ...
    • Hybrid approach to digital image watermarking using singular value decomposition and spread spectrum 

      Bhandari, Kunal (Dhirubhai Ambani Institute of Information and Communication Technology, 2005)
      We have seen an explosive growth in digitization of multimedia (image, audio and video) content and data exchange in the Internet. Consequently, digital data owners are able to massively transfer multimedia documents across ...
    • Hybrid approach to speech recognition in multi-speaker environment 

      Trivedi, Jigish S. (Dhirubhai Ambani Institute of Information and Communication Technology, 2004)
      Recognition of voice, in a multi-speaker environment involves speech separation, speech feature extraction and speech feature matching. Traditionally, Vector Quantization is one of the algorithms used for speaker recognition. ...