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Now showing items 11-13 of 13
Study of the effectiveness of various low power techniques on sequential and combinational gate dominated designs
(Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
In last decade, the technological advancement is seen in semiconductor field like never
before. The need for low power has caused a major paradigm shift where power dissipation
has become as important consideration as ...
Efficient scan-based BIST scheme for low heat dissipation and reduced test application time
(Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
Switching activity during test application can be significantly higher than that during normal circuit operation in many circuits. This is due to the fact that the correlation between consecutive test vectors is significantly ...
Designing of an efficient power clock generation circuit for complementary pass-transistor adiabatic logic carry save multiplier
(Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
This thesis presents a novel four-phase power clock generator for low power adiabatic logic without using inductors. The power clock generator is designed using current mirror arrangement of PMOS and NMOS transistors. ...