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Design of CMOS voltage controlled oscillator for high tuning range
(Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
The main objective of the work is to design a CMOS voltage controlled oscillator for higher tuning range. Today there is a great need for multi-standard wireless receivers in the wireless communications. A receiver is to ...
Implementation of constant gm CMOS op-amp input stage using overlapping of transition region at 0.18 um technology
(Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
Operational amplifier is the backbone of most of analog circuit design. For low voltage applications, op-amp should have a rail-to-rail common mode input voltage. This report describes the implementation of a constant gm ...
Low power high slew-rate adaptive biasing circuit for CMOS amplifiers
(Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
Adaptive biasing technique in analog and mixed signal integrated circuit design is used mainly to reduce the power and improve the driving capability. It has found many applications, like power amplifiers in RF communication ...
Adaptive biased switched capacitor filters
(Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
The demand from today’s handheld devices, such as laptop, ipod, cellphones is to have a long battery life with no compromises in speed. The devices dissipate power even in standby mode also. Op-amp is a major block in all ...
Analysis of charge injection in a MOS analog switch with impedance on source side
(Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
Turning off of a transistor introduces error voltage at the output of Sample and Hold circuits
which are the key components of Analog to Digital Converters (ADCs) and hence limits their
accuracy of performance in high ...
Built-in self test architecture for mixed signal systems
(Dhirubhai Ambani Institute of Information and Communication Technology, 2009)
Built-in self test architecture or BIST as we call them, are the necessity of time since the shrinking sizes of component on-chip with advance in IC technology are making it BIST artistries are being rapidly developed and ...
Capacitor mismatch in switched capacitor circuits, techniques to minimize mismatch
(Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
This thesis about the designing of capacitive mismatch insensitive switched capacitor amplifier for analog to digital converters (ADC). The accuracy of the conversion is an important factor. The accuracy depends upon the ...
Design and layout of single bit per stage pipelined ADC
(Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
The concept of pipe-lining, often used in digital circuits, can also be applied in the analog domain. It helps to achieve higher speed where several operations must be performed serially. In this work, pipe-lining is ...
Design of a CMOS variable gain amplifier
(Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
In advanced CMOS technologies as device dimensions are decreasing, requirement for lower supply voltages are increasing to make certain device reliability. So, challenges for analog circuit designers are to discover new ...
Design of a low power high slew rate OPAMP and to study its impact on sigma delta modulator's performance
(Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
This thesis presents the work done on the design of a low-power, high slew rate opamp and subsequently the design of a fully-differential second order Switched-Capacitor architecture of a Sigma Delta modulator in 1.8 V, ...