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CTS and CCOpt metodology's to achieve low skew-low power clock.
(Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
In synchronous VLSI chips, clock distribution network plays an important role. The quality of clock network mainly effects the performance of the chip, because the speed of data transfer depends on clock signal. Achieving ...
Design of the high speed, high accuracy and low power current comparators
(Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
Comparators are non linear, decision making analog circuits, which find wide spread application in data converters, data transmission and others. Comparison can be done in terms of “Voltage” or “Current”.
A current ...
High speed sample and hold circuit design
(Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
Sampling of the time-varying input signal is the first step in any type of Analog to Digital (A/D) conversion. For Low Power and high-speed A/D converter, a high-performance Sample and Hold (S/H) circuit is needed as its ...
Study of the effectiveness of various low power techniques on sequential and combinational gate dominated designs
(Dhirubhai Ambani Institute of Information and Communication Technology, 2012)
In last decade, the technological advancement is seen in semiconductor field like never
before. The need for low power has caused a major paradigm shift where power dissipation
has become as important consideration as ...