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    Author
    Sreekanth, M. (1)
    SubjectClock Distribution Network (1)Clock Tree Synthesis Methodology (1)
    Design and construction (1)
    Integrated circuits (1)Timing circuits (1)Very large scale integration (1)... View MoreDate Issued
    2013 (1)
    Has File(s)
    Yes (1)

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    CTS and CCOpt metodology's to achieve low skew-low power clock. 

    Sreekanth, M. (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
    In synchronous VLSI chips, clock distribution network plays an important role. The quality of clock network mainly effects the performance of the chip, because the speed of data transfer depends on clock signal. Achieving ...

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