dc.contributor.advisor | Dubey, Rahul | |
dc.contributor.author | Agrawal, Amit H. | |
dc.date.accessioned | 2017-06-10T14:39:50Z | |
dc.date.available | 2017-06-10T14:39:50Z | |
dc.date.issued | 2012 | |
dc.identifier.citation | Agrawal, Amit H. (2012). Forward error correction for software defined radio based on FPGA. Dhirubhai Ambani Institute of Information and Communication Technology, xiii, 70 p. (Acc.No: T00355) | |
dc.identifier.uri | http://drsr.daiict.ac.in/handle/123456789/392 | |
dc.description.abstract | In digital communication, the signal to noise ratio (SNR) of the channel is one of the major
limitations on the operating performance. Solution in terms of coded data and errorcorrecting
code has been introduced to improve the performance. Forward error correction
technique with Convolution encoding and Viterbi decoding has been introduced here for this
purpose. A Convolution encoder and Viterbi decoder of code rate 1/2, constraint length (K) of
7, 8 & 9 has been designed using Verilog HDL and incorporated with our application Software
defined radio using black box in MATLAB Simulink. It is important to improve the
performance and reduce the power and area of the decoder. In this project, Viterbi decoder
adopted the Process Element (PE) technique which made it easy to adjust the throughput of
the decoder by increasing or decreasing the number of PE. By the method of Same Address
Write Back (SAWB), the number of registers reduced to half in contrast with the method of
ping-pong. | |
dc.publisher | Dhirubhai Ambani Institute of Information and Communication Technology | |
dc.subject | Signal to noise ratio | |
dc.subject | MATLAB | |
dc.subject | Same Address Write Back | |
dc.subject | FPGA | |
dc.classification.ddc | 621.38224 AGR | |
dc.title | Forward error correction for software defined radio based on FPGA | |
dc.type | Dissertation | |
dc.degree | M. Tech | |
dc.student.id | 201011020 | |
dc.accession.number | T00355 | |