All digital low power front-end single lead ECG acquisition

Abstract

A low power single lead electrocardiogram (ECG) acquisition system which usesall digitally intensive architecture in 0.18mm CMOS process with supply voltage0.5V is presented in this research. After omitting the analog blocks like Low NoiseAmplifier (LNA), filters and passive elements (like coupling capacitor), the mainchallenges need to be addressed are achieving amplification, cancelling the impactof DC offset voltage in the circuit and removing the aliasing effect. The combinationof LNA and anti-aliasing filter is replaced by a Moving Average Voltage toTime Converter (MA-VTC) to get amplification in the time domain and to removealiasing effect. A digital feedback algorithm is used to cancel out the effect of DCoffset on the circuit. The front-end structure is designed in the subthreshold regionof MOS to reduce the power consumption and to obtain sufficient delay forMA-VTC. The designed architecture consumes 50nW of power and provides again of 670ms/V.