dc.contributor.advisor | Gupta, Sanjeev | |
dc.contributor.author | Dhami, Aarushi | |
dc.date.accessioned | 2019-03-19T09:30:59Z | |
dc.date.available | 2019-03-19T09:30:59Z | |
dc.date.issued | 2018 | |
dc.identifier.citation | Dhami, Aarushi (2018). Design and Analysis of Ultra Wideband Low Noise Amplifier. Dhirubhai Ambani Institute of Information and Communication Technology, ix, 49 p. (Acc. No: T00741) | |
dc.identifier.uri | http://drsr.daiict.ac.in//handle/123456789/775 | |
dc.description.abstract | With the advent of wireless technology, ultra wide band systems due to their fast data rate transmission have gained momentum. One of the basic building blocks of the receiver - Low Noise Amplifier (LNA) has seen various design transformations.
Initially, low noise amplifiers were designed for narrowband applications.
However, their operation was limited. With more applications of wireless technology
increasing day by day, there is a need to develop systems that can handle
wide frequency ranges. Designing low noise amplifier for wideband application
is a challenging task. The main objective is to achieve as low noise figure as possible
and maintain a constant gain over the frequencies of interest.
First and foremost task is to decide on the transistor technology to be employed.
With the various technologies available, MOSFET is chosen for this work due to
its various benefits and simplicity in the structure.
In this work, a LNA has been first designed for a single frequency, 2.4 GHz. The
work is then extended for 3-5 GHz range. A 2 stage amplifier is implemented
with a reactive input matching network. The first stage is a cascode stage with the
source of first MOSFET degenerated using an inductor. This is followed by a single
CS stage which is also responsible for wideband output matching. The work
then proceeds to the designing of amplifier for 3-10 GHz range. The implemented
design is a 3 stage amplifier. The topology uses the concept of mutual inductance
between the inductors.
All the circuits are designed and simulated in Advanced Design System (ADS).
Also, the technology used here is 0.18mm CMOS. | |
dc.publisher | Dhirubhai Ambani Institute of Information and Communication Technology | |
dc.subject | Transistor techonogies | |
dc.subject | Amplifiers | |
dc.subject | Circuit design | |
dc.classification.ddc | 621.381535 DHA | |
dc.title | Design and analysis of ultra wideband low noise amplifier | |
dc.type | Dissertation | |
dc.degree | M. Tech | |
dc.student.id | 201611059 | |
dc.accession.number | T00741 | |