Design of prominent time-to-digital (TDC) converter using single electron transistor operating at room temperature
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This project work has two main objectives. First is to introduce SET based device in digital logic circuit design, SET based devices has tremendous potential for the exploration and to improve the current CMOS based device. The other objective is to implement a basic delay line TDC and to extend it further for practical applications. Brief analysis on SET based TDC has been done on its performance and power consumption. The implemented circuit is also being built in 16nm FINFET CMOS technology to compare the results of CMOS and SET technology. Both the technology has power supply of 800mV D.C. So comparison is possible as both are small sized sub-Nano-meter range devices. A novel and efficient TDC design based on single electron transistor is proposed in this work. The aim is to work on beyond CMOS technology and current trending research area in Nano-electronics.
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