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Column decoder for memory redundant cell array
(Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
As the semiconductor technology advances, the yield of memory chip is reducing. The cause of yield degradation is errors in manufacturing process associated with tight geometries. The thesis work proposes a redundancy ...
Asynchronous analog to digital converter
(Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
Nowadays, asynchronous systems are becoming more popular for low power applications. Asynchronous Systems help to reduce metastability errors and clock skew errors. This thesis is about an asynchronous analog to digital ...
Capacitor mismatch in switched capacitor circuits, techniques to minimize mismatch
(Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
This thesis about the designing of capacitive mismatch insensitive switched capacitor amplifier for analog to digital converters (ADC). The accuracy of the conversion is an important factor. The accuracy depends upon the ...
Design of the high speed, high accuracy and low power current comparators
(Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
Comparators are non linear, decision making analog circuits, which find wide spread application in data converters, data transmission and others. Comparison can be done in terms of “Voltage” or “Current”.
A current ...
High speed sample and hold circuit design
(Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
Sampling of the time-varying input signal is the first step in any type of Analog to Digital (A/D) conversion. For Low Power and high-speed A/D converter, a high-performance Sample and Hold (S/H) circuit is needed as its ...
Single ended sense amplifier for DRAM
(Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
Today design of eDRAM is facing more challenges as the technology node is scaling
down every year. Supply Voltage is also scaling down in accordance with the technology. Thus, charge on the bitlines, to sense is also ...
Auto tuning circuit for continuous time filters
(Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
This thesis presents the design of auto tuning circuit for continuous time filters and is designed for applications that require high linearity and moderate precision. This scheme is used to improve tuning range of 50% and ...