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Showing results 1 to 6 of 6

Preview	Issue Date	Title	Author(s)
	2006	Built-in self-test for a flash analog to digital converter	Parikh, Chetan D.; Bhalerao, Mangesh
	2004	Design of frequency synthesizable delay locked loop	Bhatt, Amit; Shah, Hardik K.
	2006	Efficient scan-based BIST scheme for low heat dissipation and reduced test application time	Nagchoudhuri, Dipankar; Shah, Malav
	2006	Low power BIST architecture for fast multiplier embedded core	Nagchoudhuri, Dipankar; Vij, Aditya
	2007	Low power improved full scan BIST	Nagchoudhuri, Dipankar; Parashar, Umesh
	2006	Statistical delay modeling and analysis for system on chip	Nagchoudhuri, Dipankar; Patel, Jay

Showing results 1 to 6 of 6