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Title: | Low power high slew-rate adaptive biasing circuit for CMOS amplifiers |
Authors: | Parikh, Chetan D. Rao, A. Narayana |
Keywords: | CMOS Electronics Complementary metal oxide semiconductor Metal oxide semiconductors Complementary |
Issue Date: | 2006 |
Publisher: | Dhirubhai Ambani Institute of Information and Communication Technology |
Citation: | Rao, A. Narayana (2006). Low power high slew-rate adaptive biasing circuit for CMOS amplifiers. Dhirubhai Ambani Institute of Information and Communication Technology, ix, 47 p. (Acc.No: T00068) |
Abstract: | Adaptive biasing technique in analog and mixed signal integrated circuit design is used mainly to reduce the power and improve the driving capability. It has found many applications, like power amplifiers in RF communication systems whose biasing current is adjusted based on the detected input RF signal level. In RF tuning circuits filters can be automatically tuned simply by varying the bias current of the transconductance amplifier with respect to the control voltage. Existing techniques uses different methods like dynamically switching the current, using feed back, etc. Some of these are area efficient techniques and some are power efficient techniques. In this work, a new adaptive biasing scheme is proposed which shows excellent results in terms of both area and power without affecting amplifier design. It uses a simple input pair to sense input signals, current mirrors to generate a difference between two currents, this difference in current varies linearly with the input signal while nonlinearity is cancelled out. Simulation results shows about 80% of quiescent power can be saved while maintaining the amplifier small signal characteristics. |
URI: | http://drsr.daiict.ac.in/handle/123456789/105 |
Appears in Collections: | M Tech Dissertations |
Files in This Item:
File | Description | Size | Format | |
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200411004.pdf Restricted Access | 2.39 MB | Adobe PDF | View/Open Request a copy |
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