Please use this identifier to cite or link to this item: http://drsr.daiict.ac.in//handle/123456789/1109
Title: Design and Performance Benchmarking of Hybrid FinFET/MTJ-based Logic-In-Memory 7:2 compressor for high-speed application
Authors: Agrawal, Yash
Parmar, Rajdeep
Keywords: Complementary metal oxide semiconductor
Digital signal processor
structure simulated
HSpice software
Issue Date: 2022
Publisher: Dhirubhai Ambani Institute of Information and Communication Technology
Citation: Parmar, Rajdeep (2022). Design and Performance Benchmarking of Hybrid FinFET/MTJ-based Logic-In-Memory 7:2 compressor for high-speed application. Dhirubhai Ambani Institute of Information and Communication Technology. x, 77 p. (Acc. # T01029).
Abstract: Spintronics can be a very good candidate for the replacement of complementary metal oxide-semiconductor (CMOS) technology. A digital signal processor (DSP) has a multiplier as a key element in the circuit. Multiplier having larger propagation delay becomes the bottleneck for the chip designed because of the component being in the critical path due to larger delay. So, the parallel multiplier is used to reduce the propagation delay in which partial products have to be added which can be done by the compressor. Compressors with less propagation delay give an advantage and are more efficient. This thesis work focuses on the 7:2 compressor which has 7 inputs and 2 outputs giving compression from 7 to 2. This proposed work is implemented using the Logic in memory architecture of spintronics. Given work uses magnetic tunnel junction (MTJ). This proposed work gives a lesser propagation delay compared to work. This work has a reduction of ~11.9% in the propagation delay with nearly PDP. This thesis work can also be used with logic in memory (LIM) architecture because of the Non volatile nature of the STT-MTJ. This proposed work is based on the FinFET/MTJ structure simulated on HSpice software with 16nm technology of FinFET. For a favorable comparison, the circuits are redesigned. The 7:2 compressor circuit proposed in is redesigned using the 16nm FinFET technology. This circuit based on solely FinFET is then compared with the FinFET/MTJ based hybrid structure. The performance benchmark of the given work gives 244.36ps of the 7:2 compressor. The performance benchmarking of the FinFET/MTJ based hybrid structure with the conventional 7:2 compressor shows an improvement in the propagation delay. Given the proposed 7:2 compressor will be used in the high-speed application multiplication. Although the application of the design is not limited to multiplication, it can also be used for image compression.
URI: http://drsr.daiict.ac.in//handle/123456789/1109
Appears in Collections:M Tech Dissertations

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