Please use this identifier to cite or link to this item: http://drsr.daiict.ac.in//handle/123456789/1176
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dc.contributor.advisorMaiti, Tapas Kumar-
dc.contributor.authorNagrani, Khyati-
dc.date.accessioned2024-08-22T05:21:18Z-
dc.date.available2024-08-22T05:21:18Z-
dc.date.issued2023-
dc.identifier.citationNagrani, Khyati (2023). Neural Network Architectures for Integrated Circuits. Dhirubhai Ambani Institute of Information and Communication Technology. vii, 61 p. (Acc. # T01117).-
dc.identifier.urihttp://drsr.daiict.ac.in//handle/123456789/1176-
dc.description.abstractThis thesis presents the architecture design and implementation of neural networks(NNs) for integrated circuit design. The architecture consists of adders,multipliers, and rectified linear unit (ReLU) blocks. Three architectures, namely,Single-In Single-Out (SISO), Multiple-In Single-Out (MISO), and Multiple-In Multiple-Out (MIMO) are developed. In neural networks, weight values are necessaryand they are supplied from a memory source. The weight values were preparedby training the NNs model on software. Finally, the SISO, MISO, and MIMOneural-networks were taped out. These architectures can be used for intelligentco-processor development.-
dc.publisherDhirubhai Ambani Institute of Information and Communication Technology-
dc.subjectNeural Network-
dc.subjectIntegrated Circuits-
dc.subjectArchitecture design-
dc.subjectMIMO-
dc.subjectMISO-
dc.subjectSISO-
dc.classification.ddc621.3815 NAG-
dc.titleNeural Network Architectures for Integrated Circuits-
dc.typeDissertation-
dc.degreeM. Tech-
dc.student.id202111031-
dc.accession.numberT01117-
Appears in Collections:M Tech Dissertations

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