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Title: | Implementation of constant gm CMOS op-amp input stage using overlapping of transition region at 0.18 um technology |
Authors: | Parikh, Chetan D. Singh, Ram Sahay |
Keywords: | Analog circuit design CMOS Electronics Metal oxide semiconductors Complementary |
Issue Date: | 2006 |
Publisher: | Dhirubhai Ambani Institute of Information and Communication Technology |
Citation: | Singh, Ram Sahay (2006). Implementation of constant gm CMOS op-amp input stage using overlapping of transition region at 0.18 um technology. Dhirubhai Ambani Institute of Information and Communication Technology, x, 44 p. (Acc.No: T00088) |
Abstract: | Operational amplifier is the backbone of most of analog circuit design. For low voltage applications, op-amp should have a rail-to-rail common mode input voltage. This report describes the implementation of a constant gm rail-to-rail CMOS op-amp using complementary input pairs, at 0.18µm MOS technology. The concept used to make the input transconductance (gm) constant is the overlapping of transition regions of n-pair and p-pair tail transistors using a DC level shifter [2]. A constant gm input stage insures a uniform frequency response for the entire common mode input range. It also improves the Common Mode Rejection Ratio (CMRR). The results of the designed op-amp show that it has a rail-to-rail input common mode range and a rail-to-rail output voltage swing. For rail-to-rail output voltage swing a Class AB output stage is used. Layout of the chosen architecture is made using 0.18µm technology. Comparisons of pre-layout and post-layout simulation results are done. |
URI: | http://drsr.daiict.ac.in/handle/123456789/125 |
Appears in Collections: | M Tech Dissertations |
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