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DC Field | Value | Language |
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dc.contributor.advisor | Dubey, Rahul | |
dc.contributor.author | Tripathi, Jai Narayan | |
dc.date.accessioned | 2017-06-10T14:37:53Z | - |
dc.date.available | 2017-06-10T14:37:53Z | - |
dc.date.issued | 2009 | |
dc.identifier.citation | Tripathi, Jai Narayan (2009). Statistical co-analysis, robust optimization and diagnosis of USB 2.0 system for signal and power integrity. Dhirubhai Ambani Institute of Information and Communication Technology, xii, 62 p. (Acc.No: T00212) | |
dc.identifier.uri | http://drsr.daiict.ac.in/handle/123456789/249 | - |
dc.description.abstract | Signal Integrity (SI) and Power Integrity (PI) are the most critical issues as semiconductor industry is moving towards higher operational speeds. Signal integrity and power integrity are such issues that should be looked at system level rather than looking at active and passive networks separately. System level analysis becomes a necessity when the individual subsystems work according to specifications, and even after that complete system doesn't work well. System level signal integrity and power integrity problems for high speed serial links have been taken into account in this thesis. Serial links are being used more and more rather than parallel links due to lesser skew and lower pin counts. Specifically USB 2.0 IP is used for this thesis work, but the analysis is generic for all serial links. This thesis considers SI and PI as a dual and a common model is used which considers both SI and PI. A statistical co-analysis of SI and PI for high speed serial links is used, which can be used for a cost effective solution too. Statistical methods are used for efficient simulations and to extract maximum information contents in the least simulation combinations. Based on this co-analysis, the system is diagnosed or modified for better SI and PI. In the end, reflection gain concept is also taken in to account for the diagnosis of the system. All in all, USB 2.0 system is diagnosed for better SI and PI. System level robustness analysis of high speed serial links are taken into account with effect of external environment. A strong correlation between measured and simulated results is shown. A generic methodology for SI and PI for high speed serial links is presented with complete analysis of package, board, termination, squidd card, decoupling network etc.. | |
dc.publisher | Dhirubhai Ambani Institute of Information and Communication Technology | |
dc.subject | Signal integrity | |
dc.subject | Electronics | |
dc.subject | Power integrity | |
dc.subject | Signal processing | |
dc.subject | Digital techniques | |
dc.subject | Digital communications | |
dc.subject | Measurement | |
dc.subject | Bit error rate | |
dc.subject | Application specific integrated circuits | |
dc.subject | Power supply | |
dc.subject | Mixed signal circuits | |
dc.subject | Semiconductors | |
dc.subject | Mathematical models | |
dc.subject | Data transmission systems | |
dc.subject | Real-time data processing | |
dc.subject | Digital computer simulation | |
dc.classification.ddc | 621.382 TRI | |
dc.title | Statistical co-analysis, robust optimization and diagnosis of USB 2.0 system for signal and power integrity | |
dc.type | Dissertation | |
dc.degree | M. Tech | |
dc.student.id | 200711023 | |
dc.accession.number | T00212 | |
Appears in Collections: | M Tech Dissertations |
Files in This Item:
File | Description | Size | Format | |
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200711023.pdf Restricted Access | 6.91 MB | Adobe PDF | View/Open Request a copy |
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