Please use this identifier to cite or link to this item: http://drsr.daiict.ac.in//handle/123456789/288
Title: High-performance low-voltage current mirror design
Authors: Parikh, Chetan D.
Gandhi, Nikunj
Keywords: Linear integrated circuits
Design
Metal oxide semiconductors
Voltage mirror
Symmetrically matched transistor structure
Integrated circuit functional blocks
Linear integrated circuits
Computer-aided design
Metal oxide semiconductor field-effect transistors
Operational amplifiers
Design
Issue Date: 2010
Publisher: Dhirubhai Ambani Institute of Information and Communication Technology
Citation: Gandhi, Nikunj (2010). High-performance low-voltage current mirror design. Dhirubhai Ambani Institute of Information and Communication Technology, x, 42 p. (Acc.No: T00251)
Abstract: Design of high precision analog circuits requires accounting for the mismatch between nominally identical transistors. In this work, errors affecting CMOS current mirrors due to mismatch between identical transistors are discussed, and circuit techniques to overcome these errors are studied. The dynamic current mirror (DCM) is one of the solutions to overcome mismatch problems. Dynamic current mirrors contain analog and digital components together so that errors due to process variations, temperature and ageing effect can be cancelled. Various circuit techniques such as op-amp based DCM, reduced transconductance based DCM, and cascode based DCM have been used to improve the performance of current mirrors. This thesis proposes a novel circuit for a low-voltage high-performance dynamic current mirror design. The thesis investigates the performance of analog switches at low voltages, and suggests an improved bootstrap switch; errors due to clock feed through and charge injection in the switch are analysed. A new low charge injection, voltage-boosted analog switch is recommended in the dynamic current mirror design. A bulk-driven dynamic current mirror circuit is proposed, and found to be an effective solution at low voltage. The proposed circuit is designed optimally in a 0.18µm CMOS process, in the Cadence Spectre environment. A current copying accuracy of ±0.14% is achieved under worst case conditions.
URI: http://drsr.daiict.ac.in/handle/123456789/288
Appears in Collections:M Tech Dissertations

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