Auto tuning circuit for continuous time filters

Abstract

This thesis presents the design of auto tuning circuit for continuous time filters and is designed for applications that require high linearity and moderate precision. This scheme is used to improve tuning range of 50% and obtain an accuracy of 2-7 %. We use discrete capacitor bank to tune RC time constant instead of varying the g m (Tran conductance) to preserve linearity. The auto tuning circuit consists of analog integrator, voltage comparator, capacitor bank, clock generator and a digital tuning engine. By using tuning logic we can generate a control word and set ON chip integrator capacitor to obtain desired RC time constant. The discrete capacitor tuning scheme is designed in 180nm technology to study about the performance of tuning circuit and is simulated in Cadence design environment.