Study of power in CR-SRAM in context of precharge reference voltage.

Abstract

In Morden times power dissipation in electronic circuits has become more important due to increase use of portable and handheld devices. Increased operating frequency results in more power consumption in almost every VLSI circuits.

Scaling in integrated circuit technology directly paves way to increased package density, thereby increasing on chip power. With continuous scaling, low power design techniques results in efficient use of silicon die. Semiconductor memories are most important subsystems of modern digital systems. Modern IC’s allocate 70% of the total chip area to memory design. Large fraction of power is consumed by memory circuits, if we can reduce power consumed by memory structure can reduce overall power consumption.

This thesis is mainly concentrated on various components of power consumption in digital circuits, operation of SRAM, various technique to reduce power in SRAM and finally illustrates charge recycling SRAM for lower power consumption.