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DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Zaveri, Mazad S | |
dc.contributor.author | Dobaria, Renish | |
dc.date.accessioned | 2017-06-10T14:40:28Z | - |
dc.date.available | 2017-06-10T14:40:28Z | - |
dc.date.issued | 2013 | |
dc.identifier.citation | Dobaria, Renish (2013). 16 bit dual threshold voltage conditional carry adder.. Dhirubhai Ambani Institute of Information and Communication Technology, ix, 30 p. (Acc.No: T00391) | |
dc.identifier.uri | http://drsr.daiict.ac.in/handle/123456789/428 | - |
dc.description.abstract | So many different circuits and different schemes are applied to make circuit faster and less power consumptive. In this thesis, 16-bit dual threshold voltage conditional carry adder, with two proposed modification for improved performance, is presented. In this dual threshold Voltage concept, components in critical paths use low threshold voltage, to increase the operation speed. Other components use the normal threshold voltage to save power. In the last part of this thesis, pipelined architecture of conditional carry adder circuit is presented. It provides very high frequency of operation as compared to simple architecture. It can be operated on 1.6 GHz. | |
dc.publisher | Dhirubhai Ambani Institute of Information and Communication Technology | |
dc.subject | Dual Threshold Voltage | |
dc.subject | Solid-State Circuits | |
dc.subject | Circuits Systems | |
dc.classification.ddc | 621.381 DOB | |
dc.title | 16 bit dual threshold voltage conditional carry adder. | |
dc.type | Dissertation | |
dc.degree | M. Tech | |
dc.student.id | 201111012 | |
dc.accession.number | T00391 | |
Appears in Collections: | M Tech Dissertations |
Files in This Item:
File | Description | Size | Format | |
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201111012.pdf Restricted Access | 2.34 MB | Adobe PDF | View/Open Request a copy |
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