Please use this identifier to cite or link to this item: http://drsr.daiict.ac.in//handle/123456789/483
Full metadata record
DC FieldValueLanguage
dc.contributor.advisorMishra, Biswajit
dc.contributor.authorPatel, Chirag R.
dc.date.accessioned2017-06-10T14:41:31Z
dc.date.available2017-06-10T14:41:31Z
dc.date.issued2014
dc.identifier.citationPatel, Chirag R. (2014). All-digital delay-line based ultra wide band transmitter architecture in 0.18m CMOS. Dhirubhai Ambani Institute of Information and Communication Technology, ix, 56 p. (Acc.No: T00446)
dc.identifier.urihttp://drsr.daiict.ac.in/handle/123456789/483
dc.description.abstractUltra-Wide Band (UWB) technology has recently become a viable option for commercial wireless applications that require high data-rate and ultra low power demand. UWB technology operates between the frequency range of 3.1 GHz to 10.6 GHz and has to comply with Federal Communications Commission (FCC) standards with Power Spectral Density (PSD) below -41.3 dBm, that is also the lowest among all existing wireless systems. Thus it has a low communication range with high spatial resolution. Therefore, it finds applications in imaging and high precision positioning systems other than wireless sensor systems. Typically the UWB transmitters are implemented either using Orthogonal Frequency Division Multiplexing (OFDM) or base band techniques. Of all, the all digital technique finds interest within the research community due to the energy efficiency and benefits associated with current and future CMOS scaling. The proposed thesis discusses an all-digital UWB transmitter architecture based on all digital technique. It employs a delay line based architecture that works with Pulse Positioning Modulation (PPM), On Off Keying (OOK) and Delay Based Binary Phase Shift Keying (DB-BPSK) modulation schemes at two variable center frequencies (3.75GHz and 4.25GHz) with a fixed 500MHz bandwidth. The design also satisfies FCC indoor power spectral density requirements. We compare proposed design with the state of the art and conclude that it is comparable to existing designs and in certain cases better in view of the CMOS technology being used. The proposed design is implemented in 0.18mm technology based on a custom digital design employs OOK, PPM and DBBPSK Modulation Schemes. The Pulse Repetition Frequency (PRF) can be 100M, with 2 center frequencies (3.75GHz and 4.25GHz) with output amplitude of 120mV and achieves Energy/pulse at 16.59 pJ/p.
dc.publisherDhirubhai Ambani Institute of Information and Communication Technology
dc.subjectUltra-Wideband Architecture
dc.subjectCMOS
dc.classification.ddc621.381 PAT
dc.titleAll-digital delay-line based ultra wide band transmitter architecture in 0.18m CMOS
dc.typeDissertation
dc.degreeM. Tech
dc.student.id201211011
dc.accession.numberT00446
Appears in Collections:M Tech Dissertations

Files in This Item:
File Description SizeFormat 
201211011.pdf
  Restricted Access
4.58 MBAdobe PDFThumbnail
View/Open Request a copy


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.