Single electron transistor based 4-bit ALU design, simulation and optimization

Abstract

Objective of this thesis work is to create and optimize Single Electron Transistor(SET) based digital design. In present era for electronics, alternative approaches, other than CMOS (like SET,finFET,quantom dot) are much required. This is because of down scaling in MOSFET does not provide efficient results, mainly less than 10 nm feature size. In order to exhibit its applications, SET based digital design of 4-bit multifunctional ALU has been compared with 45 nm CMOS technology. Further using, circuit architecture optimization is performed, which results in significant improvement in design. Entire analysis is done in hierarchical manner: First gate level implementation and its comparison is done, followed by modular performance comparison and finally 4-bit ALU design is compared. So far, no one has done such analysis for design like SET based multifunctional computational tool. Finally, we can conclude that proposed design is energy efficient than 45 nm CMOS or hybrid SET CMOS design. In terms of PDP, SET based optimized design results in 93 % improvment than existing 45 nm CMOS. Transient analysis and PDP analysis have been done in bottom up approach. Low drivabilty and room temeprature operability were the two bottlenecks in SET based design. In this thesis work, design parameters are taken which are appropriate for room temparature, Drivability of SET in increased by modifying circuit architecture. With research advnacement, these two drawbacks have been overcome. In addition to these advantages, all the fabrication parameters are in practically feasible. Hence, proposed design can be fabricated and work at room temprature. SET’s multivalued application has also been verified by considering an example of Qunatizer. Aim behind selecting quantizer is because it is the most basic unit for SET based ADC & DAC circuits. By using only 2 SETs, quantizer is implemented, which is generally bulkier circuit in case of CMOS. This kind of ”Unlike CMOS applications” have few novel benefits with better performance.