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Title: | MMIC based high power transmit/receive and receive protection switches with integrated LNAs |
Authors: | Ghodgaonkar, Deepak K. Rao, Ch. V. Narasimha |
Keywords: | Microwave technology Electronic circuits Mathematical models Solid state electronics Microwave integrated circuits Radio frequency integrated circuits, Phase shifters Limiter circuits Electronic control |
Issue Date: | 2019 |
Publisher: | Dhirubhai Ambani Institute of Information and Communication Technology |
Citation: | Rao, Ch. V. Narasimha (2019). MMIC based high power transmit/receive and receive protection switches with integrated LNAs. Dhirubhai Ambani Institute of Information and Communication Technology, xiv, 133 p. (Acc.No: T00826) |
Abstract: | The conventional high power microwave signal switching component is the Silicon/GaAs PIN diode, while the recently GaN pHEMT devices are being used for this application. GaAs FET, used as switching element as a PIN diode replacement, has the advantages of having fast switching speeds, simplified bias networks, monolithic compatibility, and lower power consumption driver circuitry. The major advantage of having a GaAs FET based high power T/R switch or protection switch is that other functionalities of Receiver can be integrated on to MMIC (Monolithic Microwave Integrated Circuit) making a multi-functional core-chip. However, the power performance of a FET is limited by its current-handling capability in its low-impedance state and by its breakdown voltage in its high-impedance state. In this thesis, various new and novel circuit architectures are presented for increasing the power handling capability of GaAs FET based switches, using low noise and low power processes, to enable the realization of high power T/R switch with integrated LNA or absorptive high power receive protection switch with integrated LNA. So developed technique is employed for designing high power GaN FET based switches to further increase the power handling capability, beyond that of individual GaN FET switch, and also integrating LNA using the same GaN process. On-the-chip current distributed architecture, for increasing the power handling capability, is proposed, analyzed and employed for realizing a GaAs MMIC 10W T/R switch with integrated LNA, employing 0.25-?m GaAs pHEMT process (PH25 of M/s UMS, France). The measured transmit loss, Noise Figure (NF) and receive path gain are 1.0 dB, 2.5 dB and 5.6 dB respectively over 9.3-9.9 GHz. Novel impedance transformation along with on-the-chip current distribution technique, for increasing the power handling capability and improving the receive path loss, is proposed, analyzed, and employed for designing a GaN MMIC 200W T/R switch with integrated LNA, using 0.25-?m GaN pHEMT process (GH25 of M/s UMS, France). The layout level electromagnetic and co-simulation results of this 200W pulsed power handling capability T/R switch with integrated LNA are 0.8 dB transmit path loss with 45 dB receive isolation, and 2.6 dB NF with 20 dB gain for the receive path over 3.1-3.3 GHz. Also, in this thesis, novel FET stacking along with on-the-chip current distributed architecture, for increasing the power handling capability and improving the receive path loss, is proposed, analyzed and employed for realizing a GaAs MMIC 20W absorptive receive protection switch with integrated LNA, employing 0.13-?m GaAs pHEMT process (D01PHS of M/s OMMIC, France). The measured results are protection up to 20W with 28 dB receive isolation, 2.9 dB NF and gain of 20 dB over 9.3-9.9 GHz. The constituent components required for designing T/R Switch with LNA, viz., high power quadrature hybrids, high power switches, LNAs are studied and design details presented. Various high power MMIC quadrature hybrid configurations have been studied and the design, analysis and simulation results of compact distributed high power MMIC spiral hybrid and high power MMIC quasi lumped impedance transforming hybrid are presented. MMIC GaAs and GaN HEMT based switch configurations have been studied vis-a-vis the power handling capability and novel techniques like on-the-chip current distributed architecture for increasing the power handling capability and techniques of impedance transformation and FET stacking techniques for improving the receive path insertion loss are proposed, analyzed and simulation results are presented. MMIC GaAs HEMT based Low Noise Amplifiers' configurations have been studied and X-band single stage and two-stage LNA design, simulations and measurement results are presented. MMIC GaN HEMT based S-band Low Noise Amplifier design and simulation results are presented. |
URI: | http://drsr.daiict.ac.in//handle/123456789/887 |
Appears in Collections: | PhD Theses |
Files in This Item:
File | Size | Format | |
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201021009_Rao, Ch. V. Narasimha.pdf | 4.33 MB | Adobe PDF | View/Open |
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