M Tech Dissertations

Permanent URI for this collectionhttp://drsr.daiict.ac.in/handle/123456789/3

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Subject: search.filters.subject.Computer storage devices

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    Low power SRAM design
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2008) Bambhaniya, Prashant; Dubey, Rahul
    In the past, power dissipation was not constraining factor because of device density and operating frequency was low enough. But nowadays due to increased integration and operating frequency of integrated circuits, power consumption has become an important factor. Battery operated portable devices which performing the high performance processing task also consumes lots of power. The various methodologies are used to reduce the power dissipation by optimizing the parameters that are related to power consumption of circuit. The Static RAM is used as a cache memory in the processor and also has an application in the embedded system. Due to continuous advances in the integrated circuit technology, the density of SRAMs in embedded application has grown substantially in recent years. The SRAM block is becoming indispensable block in the system-on-chips (SoCs). The larger density SRAM block has a highly capacitive bit lines and data lines. The dynamic power of SRAM is mainly due to charging and discharging of highly capacitive lines. To perform the write operation in the SRAM cell to flip the data value, nearly full voltage swings is required on the bit line. This full voltage swing on the highly capacitive bit lines will consumes a greater amount power according to law of CV2f. Thus voltage swing reduction is an effective way to decrease the power dissipation. The current mode sensing technique is proposed to give the small voltage swing on the bit lines during write operation. In the proposed method the layout and simulation is done for the one bit line pair for three different methodologies. The bit line interference of selected cell with adjacent selected and non selected cell is also checked out. The proposed current conveyor method has shown an improvement in terms power dissipation over the voltage write and current read (VWCR) and current write and current read (CWCR) method without comprising the performance.
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    ItemOpen Access
    Distributed caching mechanism for video on demand on the Internet
    (Dhirubhai Ambani Institute of Information and Communication Technology, 2006) Soni, Maulik; Srivastava, Sanjay; Lenin, R. B.
    Video on Demand applications in the Internet are delay sensitive and highly resource intensive applications. Such applications require streaming of large video files in a time bound manner. Because large volume in terms of data and high transmission rate video streaming requires high bandwidth and storage space than data transfer applications. Caching an ongoing stream at an intermediate node between the content server, which provides video on demand service, and the client(s) is a viable solution to save resources. The proposed scheme is such a caching scheme, which caches video content among the intermediate nodes in a distributed manner. The streams are cached among the dynamically selected caching nodes and the clients are served the video content from these nodes. The caching nodes contact each other and collaboratively act together to provide the service. The scheme also proposes a heuristic to estimate resource requirements for the video on demand systems. The behavior of the scheme is demonstrated through simulation. The quality of service using the proposed scheme is compared with some of the existing schemes.