Publication:
Neural Network-based Fast and Intelligent Signal Integrity Assessment Model for Emerging MWCNT Bundle On-Chip Interconnects in Integrated Circuit

dc.contributor.affiliationDA-IICT, Gandhinagar
dc.contributor.authorBhatti, Gulafsha
dc.contributor.authorPathade, Takshashila
dc.contributor.authorAgrawal, Yash
dc.contributor.authorPalaparthy, Vinay
dc.contributor.authorGohel, Bakul
dc.contributor.authorParekh, Rutu
dc.contributor.authorKumar, Mekala Girish
dc.contributor.researcherGulafsha Bhatti (202021005)
dc.contributor.researcherTakshashila Pathade (201621013) 
dc.date.accessioned2025-08-01T13:09:34Z
dc.date.issued26-02-2023
dc.description.abstractAt nanometer technology nodes, the efficient signal integrity and performance assessment of vast on-chip interconnects are crucial and challenging. For a long time, copper (Cu) has been used as an interconnect material in integrated circuits (ICs). However, as heading towards lower technology nodes, Cu is becoming inadequate to satisfy the requirements for high-speed applications due to its physical limitations. To mitigate this issue, a multiwall carbon nanotube bundle (MWCNTB) is proven to be a better replacement for Cu. Hence, the current work innovatively focuses on modeling, analysis, and performance evaluation of MWCNTB interconnects at 32?nm technology nodes using various machine learning (ML) and neural network (NN) based techniques for signal integrity assessment and fast computation of on-chip interconnect design. Based on the results obtained by comparing the different performance parameters, it is envisaged that NN-based ADAM technique leads to the best-suited model. The developed model is fruitful in evaluating the output performance of the system, such as power-delay-product (PDP), performing parametric analysis, and predicting optimum input design parameters of the driver-interconnect-load (DIL) system. This work utilizes HSPICE and Python electronic design automation tools for its implementation.
dc.format.extent2878-2893
dc.identifier.citationGulafsha Bhatti, Takshashila Pathade, Agrawal, Yash,Palaparthy, Vinay S, Gohel, Bakul, Parekh, Rutu, and Mekala Girish Kumar, "Neural Network-based Fast and Intelligent Signal Integrity Assessment Model for Emerging MWCNT Bundle On-Chip Interconnects in Integrated Circuit," IETE Journal of Research, Taylor & Francis, ISSN: 0974-780X, 26 Feb. 2023, pp. 1-16, doi: 10.1080/03772063.2023.2177201.
dc.identifier.doi10.1080/03772063.2023.2177201
dc.identifier.issn0974-780X
dc.identifier.scopus2-s2.0-85149272898
dc.identifier.urihttps://ir.daiict.ac.in/handle/dau.ir/2041
dc.identifier.wosWOS:000940422700001
dc.language.isoen
dc.publisherTaylor & Francis
dc.relation.ispartofseriesVol. 70; No. 3
dc.source IETE Journal of Research
dc.source.urihttps://www.tandfonline.com/doi/abs/10.1080/03772063.2023.2177201
dc.titleNeural Network-based Fast and Intelligent Signal Integrity Assessment Model for Emerging MWCNT Bundle On-Chip Interconnects in Integrated Circuit
dspace.entity.typePublication
relation.isAuthorOfPublication3cc1160e-2d03-49ec-842b-cc76c6d35776
relation.isAuthorOfPublicationdbe8164f-7d10-44b4-9b2a-88bf75fb926e
relation.isAuthorOfPublicationd237fc48-3ac9-47aa-9b77-6c88ce84754f
relation.isAuthorOfPublication0b6efcb3-4f1e-438f-b5b7-51bdd172fa2e
relation.isAuthorOfPublication3cc1160e-2d03-49ec-842b-cc76c6d35776
relation.isAuthorOfPublicationd237fc48-3ac9-47aa-9b77-6c88ce84754f
relation.isAuthorOfPublication.latestForDiscovery3cc1160e-2d03-49ec-842b-cc76c6d35776

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