FPGA implementation of direct sequence spread spectrum techniques
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Dhirubhai Ambani Institute of Information and Communication Technology
Abstract
This work presents the performance, noise analysis and FPGA implementation of Direct Sequence Spread Spectrum technique. Performance of signal increases as increasing parity bits in Hamming code algorithm. Increasing parity noise goes reduce therefore received signal close to its original value, but adding parity band-width requirement also increases. This work is bases on the IS-95 standard for CDMA (Code Division Multiple Access) Digital Cellular.
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Keywords
Field programmable gate arrays, Computer-aided design, Verilog, Computer hardware description language, Neural networks, Computer science, Field programmable gate arrays, Mobile communication systems, Telecommunication systems, Management, Modeling, Computer programs, Sensor networks, Simulation methods, Wireless communication systems
Citation
Choudhary, Vivek Kumar (2008). FPGA implementation of direct sequence spread spectrum techniques. Dhirubhai Ambani Institute of Information and Communication Technology, 34 p. (Acc.No: T00179)