Design of prominent floating point multiplier using single electron transistor operating at room temperature

Simple item page
dc.accession.numberT00796
dc.classification.ddc621.3815 BAN
dc.contributor.advisorParekh, Rutu
dc.contributor.advisorAgrawal, Yash
dc.contributor.authorBanik, Sanghamitra
dc.contributor.authorTrivedi, Rachesh
dc.date.accessioned2020-09-14T07:48:57Z
dc.date.accessioned2025-06-28T10:23:18Z
dc.date.available2020-09-14T07:48:57Z
dc.date.issued2019
dc.degreeM.Tech
dc.description.abstractThis project work has two main objectives. First is to introduce SET based device in digital logic circuit design. SET based devices has tremendous potential for the exploration to improve the current CMOS based device. The other objective is to implement 8bit,16bit and 32bit floating point multiplier. Performance analysis of and comparison of SET based floating point multiplier has been done with 16nm technology.An efficient floating point multiplier based on single electron transistor is proposed in this work. The aim is to work beyond CMOS technology and current trending research area in Nano-electronics.
dc.identifier.citationBanik, Sanghamitra ; Trivedi, Rachesh (2019). Design of prominent floating point multiplier using single electron transistor operating at room temperature. Dhirubhai Ambani Institute of Information and Communication Technology, 23p. (Acc.No: T00795)
dc.identifier.urihttp://drsr.daiict.ac.in/handle/123456789/876
dc.publisherDhirubhai Ambani Institute of Information and Communication Technology
dc.student.id201711041
dc.subjectSET based device
dc.subjectFINFET CMOS technology
dc.subjectTDC
dc.titleDesign of prominent floating point multiplier using single electron transistor operating at room temperature
dc.typeDissertation

Files

Original bundle

Now showing 1 - 1 of 1
Thumbnail Image
Name:
201711041.pdf
Size:
1.24 MB
Format:
Adobe Portable Document Format
Description:
Dissertation
Download

Collections

M Tech Dissertations