Area reduction in 8 bit binary DAC using current multiplication

Simple item page
dc.accession.numberT00117
dc.classification.ddc621.39814 UPR
dc.contributor.advisorParikh, Chetan D.
dc.contributor.authorUpraity, Maitry
dc.date.accessioned2017-06-10T14:37:11Z
dc.date.accessioned2025-06-28T10:19:08Z
dc.date.available2017-06-10T14:37:11Z
dc.date.issued2007
dc.degreeM. Tech
dc.description.abstractA proposed current multiplication technique is applied on 8 bit binary current steering Digital-to -Analog Converters with LSB 150 μA, to reduce area. MSB 1 and MSB 2 current are first kept half to reduce area and then current multiplication is performed to get the desired output. Compare to the conventional binary current steering Digital-to-Analog Converters, 20.66% area is reduced and static errors are found within limit. Maximum Integral nonlinearity is-18μA (< LSB) and Differential nonlinearity5.02 μA (< LSB).
dc.identifier.citationUpraity, Maitry (2007). Area reduction in 8 bit binary DAC using current multiplication. Dhirubhai Ambani Institute of Information and Communication Technology, ix, 30 p. (Acc.No: T00117)
dc.identifier.urihttp://drsr.daiict.ac.in/handle/123456789/154
dc.publisherDhirubhai Ambani Institute of Information and Communication Technology
dc.student.id200511022
dc.subjectAnalog-to-digital converters
dc.subjectDigital-to-analog converters
dc.subjectDesign and construction
dc.subjectElectronic circuit design
dc.subjectMicrowave integrated circuits
dc.subjectLinear integrated circuits
dc.subjectMicrowave equipment circuits
dc.titleArea reduction in 8 bit binary DAC using current multiplication
dc.typeDissertation

Files

Original bundle

Now showing 1 - 1 of 1
Thumbnail Image
Name:
200511022.pdf
Size:
612.78 KB
Format:
Adobe Portable Document Format
Download

Collections

M Tech Dissertations