Browsing by Title

Now showing items 571-590 of 1001

    • Low power ASIC design using CPF 

      Patel, Darshal (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      In recent years, with remarkable growth in personal computing devices, consumer electronics and communication devices, there has been seen urgent requirement for high speed computation and increased functionality. The ...

    • Low Power ASIC Implementation of SC-FDMA 

      Tandel, Deep (Dhirubhai Ambani Institute of Information and Communication Technology, 2017)
      "Single Carrier-Frequency Division Multiple Access (SC-FDMA), a modified version of Orthogonal Frequency Division Multiple Access (OFDMA) is the preferred uplink access scheme for Long Term Evolution (LTE). We aim to design ...

    • Low power BIST architecture for fast multiplier embedded core 

      Vij, Aditya (Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
      A typical core is deeply embedded in the chip of a system so that direct access to its input/output is not possible. Built in self test (BIST) structures are excellent solutions for testing embedded cores. In this work, ...

    • Low power high slew-rate adaptive biasing circuit for CMOS amplifiers 

      Rao, A. Narayana (Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
      Adaptive biasing technique in analog and mixed signal integrated circuit design is used mainly to reduce the power and improve the driving capability. It has found many applications, like power amplifiers in RF communication ...

    • Low power high speed amplifier design 

      Bensal, Jitendra Babu (Dhirubhai Ambani Institute of Information and Communication Technology, 2006)
      The operational amplifier (op-amp) is one of the important component in analog to digital converters. The power consumption of these converters mostly depend on the op-amps used. The accuracy and speed performance of analog ...

    • Low power improved full scan BIST 

      Parashar, Umesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      Low power testing of VLSI circuits has recently become an area of concern due to yield and reliability problems. Past research on low power testing has shown that, switching activity and test time are the main factors that ...

    • Low power microprocessor design 

      Bhatt, Vishal (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      This research work tries to reduce the power consumption of a processor with signal processing features. For low power design, focus is on developing ‘Low power synthesizable Register File’, as the initial study shows that ...

    • Low power SAR ADC with split capacitor DAC 

      Dhalvaniya, Pankaj (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      Analog to Digital convertor and Digital to Analog convertors plays a vital role in Mixed Signal Design. Nowadays, the demand for designing of Low power, Moderate Resolution ADCs are increasing for Bio-medical applications ...

    • Low power SRAM design 

      Bambhaniya, Prashant (Dhirubhai Ambani Institute of Information and Communication Technology, 2008)
      In the past, power dissipation was not constraining factor because of device density and operating frequency was low enough. But nowadays due to increased integration and operating frequency of integrated circuits, power ...

    • Low-power multi-ported register file for digital signal processors 

      Aguduri, Nagamanoj Kumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
      Digital Signal Processors (DSPs) also come under the category of processors in which Multi-ported register files can find their applications widely. Most of the DSP applications do not benefit from further speeding-up after ...

    • Low-power pipelined crypto-core using a backup flip-flop 

      Patel, Sagar (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      With increasing clock frequencies, power-aware computing has become a critical concern in the VLSI design. One of the most effective and widely used method for lowering the power is DVS (Dynamic Voltage Scaling), which ...

    • Low-rank and sparse decomposition of compressively-sensed matrices: applications to surveillance video processing 

      Lekshmi, Ramesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2015)
      Detection, recognition and tracking are three of the primary tasks involved in surveillance video processing. Given the huge amount of data generated by surveillance systems, it is desirable to use compressed sensing ...

    • Machine learning in financial data EPS estimates 

      Sharma, Rohan (2020)
      The project “EPS Estimates” is as the name suggests a work on Earnings Per Share figures released by companies annually and quarterly. The whole project is intended to come up with a better consensus methodology for EPS ...

    • Malicious Node Detection for various Heterogenous IoT Communication Protocols 

      Mekala, Priyanka; Goel, Supriya (2021)
      In recent years security is an increased concern for IoT devices. Due to limited capabilities compared to traditional computer systems, these tiny devices cannot run the heavy encryption algorithms required for preventing ...

    • Mamta Kavach Prevention and Identification of Disabilities in Early Stages of Childhood 

      Gulati, Shaina (Dhirubhai Ambani Institute of Information and Communication Technology, 2018)
      Early childhood is the most rapid period of development in a human life. The years from conception through birth to six years of age are critical to the complete and healthy cognitive, emotional and physical growth of ...

    • Manifold valued image segmentation 

      Bansal, Sumukh (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      Image segmentation is the process of partitioning a image into different regions or groups based on some characteristics like color, texture, motion or shape etc. Segmentation is an intermediate process for a large number ...

    • Market research for banana crop and development of multimedia system on package of practices for banana cultivating farmers 

      Patel, Roshan B. (Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
      Banana crop is one of the major crop in Gujarat as per productivity concern Gujarat comes 2nd in India. Vadodara, Anand, Kheda, Narmada, Bharuch, Surat, Valasad, Bhavnagar, Junagadh are Banana growing district in Gujarat. ...

    • Market research for mango crop and multimedia information system on integrated pest and nutrient management 

      Sabhaya, Sandip (Dhirubhai Ambani Institute of Information and Communication Technology, 2011)
      Banana crop is one of the major crop in Gujarat as per productivity concern Gujarat comes 2nd in India. Vadodara, Anand, Kheda, Narmada, Bharuch, Surat, Valasad, Bhavnagar, Junagadh are Banana growing district in Gujarat. ...

    • MBE: Client Side Secure Data Deduplication Based on Merkel Tree 

      Joshi, Kriti (2021)
      Several secure data deduplication protocols are recently proposed to maintain unique data copies at the cloud service providers (CSP’s) and utilize the storage space efficiently. Though many Message Locked Encryption (MLE) ...

    • Measurement of complex permittivity of materials using rectangular dielectric wave guide (RDWG) technique in 5.85-8.20 Ghz range 

      Rout, Debadutta (Dhirubhai Ambani Institute of Information and Communication Technology, 2018)
      The Rectangular DielectricWaveguide (RDWG)Technique is an efficient technique developed for the measurement of complex permittivity of materials of various thickness and cross sectional areas over various frequency ranges ...