Browsing by Subject "HDL Implementation"

Now showing items 1-4 of 4

    • HDL implementation and study of ANN architecture mapping onto multiple processing nodes 

      Dalal, Tejas D. (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      A general methodology has implemented on several Processing Nodes (PN) to be connected to form an Artificial Neural Network (ANN). This design has multiple Activation functions on the same architecture which makes it ...

    • HDL implementation of a node of bayesian polytree interface 

      Patel, Jayendra (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      In this thesis, we have particularly focussed on the aspects of the hardware implementation of the Bayesian inference framework within the George and Hawkins’ model. This framework is based on Judea Pearl’s belief propagation. ...

    • HDL implementation of associative memory based instruction predictor for power reduction 

      Rangani, Jaydeep (Dhirubhai Ambani Institute of Information and Communication Technology, 2014)
      Now a days, power consumption in digital integrated circuits/systems is a major issue. The goal here is to reduce power consumption, by assuming the circuit is divided in different power consuming modules, observing their ...

    • HDL implementation of palm associative memory 

      Kacheria, Rachit M. (Dhirubhai Ambani Institute of Information and Communication Technology, 2013)
      The objective of this paper is to implement and analyze the palm associative memory proposed by G. Palm [1]. In this paper, a design implementation of this algorithm, based on Verilog HDL (hardware description language) ...