dc.contributor.advisor | Parikh, Chetan D. | |
dc.contributor.author | Upraity, Maitry | |
dc.date.accessioned | 2017-06-10T14:37:11Z | |
dc.date.available | 2017-06-10T14:37:11Z | |
dc.date.issued | 2007 | |
dc.identifier.citation | Upraity, Maitry (2007). Area reduction in 8 bit binary DAC using current multiplication. Dhirubhai Ambani Institute of Information and Communication Technology, ix, 30 p. (Acc.No: T00117) | |
dc.identifier.uri | http://drsr.daiict.ac.in/handle/123456789/154 | |
dc.description.abstract | A proposed current multiplication technique is applied on 8 bit binary current steering Digital-to -Analog Converters with LSB 150 μA, to reduce area. MSB 1 and MSB 2 current are first kept half to reduce area and then current multiplication is performed to get the desired output.
Compare to the conventional binary current steering Digital-to-Analog Converters, 20.66% area is reduced and static errors are found within limit. Maximum Integral nonlinearity is-18μA (< LSB) and Differential nonlinearity5.02 μA (< LSB). | |
dc.publisher | Dhirubhai Ambani Institute of Information and Communication Technology | |
dc.subject | Analog-to-digital converters | |
dc.subject | Digital-to-analog converters | |
dc.subject | Design and construction | |
dc.subject | Electronic circuit design | |
dc.subject | Microwave integrated circuits | |
dc.subject | Linear integrated circuits | |
dc.subject | Microwave equipment circuits | |
dc.classification.ddc | 621.39814 UPR | |
dc.title | Area reduction in 8 bit binary DAC using current multiplication | |
dc.type | Dissertation | |
dc.degree | M. Tech | |
dc.student.id | 200511022 | |
dc.accession.number | T00117 | |