Now showing items 1-2 of 2

    • Low power improved full scan BIST 

      Parashar, Umesh (Dhirubhai Ambani Institute of Information and Communication Technology, 2007)
      Low power testing of VLSI circuits has recently become an area of concern due to yield and reliability problems. Past research on low power testing has shown that, switching activity and test time are the main factors that ...
    • Transaction based verification of discrete wavelet transform IP core using wishbone transactor 

      Patel, Birenkumar (Dhirubhai Ambani Institute of Information and Communication Technology, 2010)
      Verification is major concern in product development life cycle. The number of human hours required writing a test bench and choice of verification approach is the major contributor in the Non Recurring Engineering (NRE) ...